TechForce :: SoC Functional Verification















	Graphics SoC 65nm - RTL & Gate-level verification, porting of simulation environment, regression, emulation Processor Chipset 90nm - Unit-level verification, regression, debug VDSL SoC 90nm - Block level verification & debug, test vector enhancement

	"TechForce has developed the entire test environment for us. Their verification engineers contributed a great deal in the success of our design" Verification Manager Leading Wireless Company

TechForce design verification expertise helps you to build verification environments for complex, multimillion gate SoCs, thereby shortening the verification cycle. Our engineers help build scalable verification environments for module and SoC level verification that provide maximum functional coverage.

Our capabilities in Verification include:

Verification Environment Design & Development
Test Plan & test case generation
Module/chip/system level verification
System modeling
Bus functional models creation
Functional and Code coverage analysis
Verification Languages - Verilog, VHDL, C / C++, Specman, VERA, System Verilog
Wide domain knowledge – Wireless, Ethernet, SONET, ATM, Processors, Graphics, Multimedia, Storage, PCI, PCIX, PCI Express, USB 2.0 and many more

Our Silicon Validation expertise includes:

Pre-Silicon Validation

Hardware Acceleration
Hardware Software Co-verification
FPGA Prototyping
Pre-prototype Firmware Development & Test

Chip Bring - up and Post - Silicon Validation

Chip bring-up
Board level Silicon Validation
Firmware Development & Testing

System Validation

Silicon & Board Functionality Validation
System-level Validation with Application

For more information on how you can benefit from our Design Verification expertise, please email us to sales@tforceinc.com.